Because there is the difference between two bias currents called input offset current I OS, there exists a little bit of DC output offset voltage and it is as below. Unfortunately, in general OP-Amp, two bias currents are not exactly same, and the value I b becomes the average of two input bias currents. However, this means the bias current flowing on two input terminals are same. Because two voltages have same sizes and opposite polarities, they set off each other. Therefore, the voltage between R3’s both ends is same as the voltage between both ends of parallel combined resistance of R1 andR1, and the polarity is opposite. This additional resistance is same as the parallel combination of R1 and R2. General way to calibrate output offset voltage caused by input bias current is to insert the resistance R3 between non-inverting (+) input terminal and the earthing, as in fig.
8-7Calibration Circuit of Output Offset Voltage Caused by Input Bias Current
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